PREMIUM ADS
DELIVERY, COLLECTONS AND INSTALLATION POSITION!
PRIORITY SALES & RENTALS IS NOW HIRING PT & FT! GREAT STARTING...
Cedar Creek 5th Wheel
This 5th wheel is loaded and comes with many upgrades to the base mode...
Gheen Irrigation Pipe Press
3 Phase, 5 inch Torque, 800 Ram, new pump, new valve bank....
Ford 150 Lariot Super Cab
Runs good, leather seats, automatic, Triton V-8....
Seeking Welders
Seeking welders at our Coleman, Texas location. Experience in tig, mig...
T.L.C. Services
Residential,commercial,move ins,move outs services provided weekly as ...
2014 Ford F-150 Raptor
Excellent condition limited edition Raptor fully loaded, Beige, Black ...
Lots, Acreage,Homes
Looking to buy property in Texas? We have lots, acreage and fixer uppe...

Verification Engineer:

THIS AD HAS EXPIRED ! - Job Description
Summary :
We are Iooking for an individual to fill a position for a Iogic - Verification engineer. Candidates must have experience performing FPGA - Verification based on architectural/micro-architectural specification review and analysis followed with definition of - Verification requirements. The person in this position will also have the following responsibilities: Develop tests and test bench components from high Ievel - Verification plans, as well as debug of failing tests, definition of functional coverage space, implementation of coverage monitors and analysis of test coverage space, regression running and debugging failing tests, design and development of test bench collateral. Team members will also work closely with design and architecture teams to review and refine test and coverage requirements. Educational requirements for this position are a BSEE/CE minimum, MS preferred.Also required is 5-10 years ? experience in FPGA Iogic - Verification and strong software skills with experience using 1 or more of the following Ianguages: System - Verilog/Verilog, Perl, C/C++. Candidates should also have experience with RTL simulators, - Questa preferred, experience specifying and developing test bench components, specifying, developing, and debugging functional tests, and experience specifying, implementing and analyzing functional coverage.
Qualification :
Proficient in SystemVerilog for verification, including random constraints, functional coverage, and SVA.
Proficient in UVM or similar libraries.
Proficient in EDA tools such as Questa, with familiarity of flow from coverage specification to closure using Questa VM or equivalent. Strong object-oriented design (OOD) and object-oriented programming (OOP) skills highly desirable.
Click on the link to apply:http://www.derivetalent.com/career/9305928
Visit our website for more information about jobs:http://www.derivetalent.com/
Price: -
19 Dec 2016   San Jose, CA
Other ads in Jobs - Engineering Jobs category

Online JAVA / J2EE Training

MindsMapped offers Java / J2EE online training to candidates who want to get a job in Java domain or...
Price: 700
27 Apr 2017   San Diego, CA
Please help us keep this web site family friendly by reporting any unsafe ad.
This web site is not endorsed nor affiliated with any American Classifieds publication.
Our service is only for online classified ads placed by, or addressed to USA residents.